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A 384M LLM Learns to Call Tools From Scratch While Rockchip Chases 44 TOPS at the Edge

Prateek SinghOctober 25, 20264 min read199 views
A 384M LLM Learns to Call Tools From Scratch While Rockchip Chases 44 TOPS at the Edge

A from-scratch tiny LLM, a sub-1-bit quantization trick, a MoE model on a phone NPU, and two new chips round out today's edge sweep.

A 384M LLM, Trained From Scratch, Learns to Call Tools

Udgam Labs released Udgam-384M on October 10, 2026, a family of three English-language models with 384.4 million parameters, trained from scratch on roughly 8 billion tokens and shared under an Apache-2.0 license, according to the company's own technical report.

The chat variant is built to sit inside an app rather than a chat window: given a list of tools, it turns a request into a function call, fills a JSON schema from a document, or drafts a shell command for a person to approve. It uses the Gemma 4 architecture and chat format, so the same weights load unchanged in transformers, llama.cpp, Ollama, LM Studio and MLX, and the 4-bit GGUF file is just 238MB.

Udgam Labs is a small, little-known shop, and its own benchmarks haven't been independently checked. Still, a 384M model trained from scratch rather than distilled, and sized to fit comfortably on a phone or a Raspberry Pi, is exactly the kind of building block the sub-1B tier of this beat needs more of.

Sub-1-Bit Quantization Squeezes a 70B Model Onto an 8GB GPU

A new paper called NanoQuant, posted to Hugging Face's papers feed, claims the first post-training quantization method to push LLMs below 1 bit per weight, combining low-rank binary factorization with ADMM optimization, according to the paper page.

The headline number: the authors compress Llama2-70B from 138GB down to 5.35GB in 13 hours on a single H100, and report the result running at up to 20.11 tokens per second on a consumer 8GB GPU. That's a self-reported figure from the paper's own tables, not an independent benchmark, and the target hardware is still a desktop GPU, not a microcontroller or phone.

The relevance to tiny hardware is indirect but real: techniques that work at sub-1-bit on 70B models tend to migrate downward into smaller models and tighter budgets. If the custom binary GEMV/GEMM kernels the team built hold up on genuinely edge GPUs, this is a preview of how much further weight compression still has to go.

A 24B MoE Model Runs Entirely on a Phone-Class NPU

Lahore-based 10xEngineers published a write-up running Liquid AI's LFM2.5-24B-A2B mixture-of-experts model — 24B total parameters, only 2B active per token — entirely on the Hexagon NPU of a Qualcomm IQ-9075 board, using llama.cpp as the inference engine, per their blog post.

They compared stock upstream llama.cpp against two builds using their own NPU kernel library, KernelX, aimed at keeping the Hexagon's compute units busy instead of falling back to the CPU between expert swaps. The numbers are the team's own, not an independently audited benchmark, and KernelX is not yet upstream.

What makes this worth watching is the model, not just the runtime: a 24B-parameter MoE with a 2B active path is designed precisely for phone-class NPUs. Getting it to route through the Hexagon's matrix units rather than its CPU cores is the unglamorous plumbing that decides whether MoE models become a real phone option, or stay a laptop-only curiosity.

Rockchip's RK3668 Chases 44 TOPS and PCIe 5.0

Rockchip's upcoming RK3668 pairs a 44 TOPS NPU with PCIe 5.0 support on a 6nm process, built around six Arm Cortex-A725 cores, two Cortex-A520 cores and a Mali-G2 Pro MC4 GPU, according to LinuxGizmos's report published October 25, 2026.

No shipping boards or price exist yet, and Rockchip has not confirmed availability dates — this is a chip announcement, not a product. But PCIe 5.0 on an edge SoC is unusual; it suggests Rockchip is targeting systems that pair the NPU with fast external storage or accelerators, a step up from the RK3588-class chips that currently dominate this price tier.

An Open-Hardware STM32H7 Board Learns to Drive HDMI Under Zephyr

The Zephyr Project highlighted a new open-hardware board built around STMicro's STM32H7 microcontroller, designed specifically to drive HDMI graphics output on Zephyr RTOS devices, in an October 22, 2026 post.

The board is a reference design rather than a commercial product, released with open schematics so other Zephyr developers can replicate or modify it. For a beat where most embedded graphics work happens on Raspberry Pi-class Linux SBCs, a microcontroller-level board with dedicated HDMI output under a real-time OS fills a narrow but useful gap: dashboards, kiosk displays and instrument panels that need deterministic timing more than a full Linux stack.

Five stories today span four orders of magnitude of model size — from a 384M tool-caller to a sub-1-bit 70B compression trick — plus two chips that haven't shipped yet. The sources below are worth a direct look before trusting anyone's benchmark tables, including ours.

References & Citations

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