Edge Dispatch: IBM Ships an Edge-First Granite LLM as RISC-V AI Boards Keep Fragmenting the Toolchain

IBM's Granite 4.2 Adds a 3B Model Built for the Edge

IBM released its Granite 4.2 family on August 25, 2026: a 3B model aimed at edge devices, an 8B mid-range option, and a 30B model that can stretch its context to 512K tokens. All three ship under Apache 2.0 and carry a native 128,000-token context window, with a switchable chain-of-thought mode so the model can toggle between fast answers and slower step-by-step reasoning, according to Crypto Briefing.

The 8B and 30B variants got extra agentic reinforcement-learning training on simulated terminals, code execution, and web search; the 3B model supports tool-calling too, just without that specialized training pass. Weights are on Hugging Face and Ollama, with support for vLLM, SGLang, and OpenAI-style tool-calling APIs, so existing agent pipelines don't need rewriting.

The honest caveat: 'built for edge' here means factory-floor gateways and retail boxes, not an ESP32. A 3B model, even at 4-bit, still needs roughly two gigabytes of memory — that's Raspberry Pi 5 or AI-PC territory, not microcontroller territory. What's notable is that a major open-model lab is now shipping a dedicated edge-size variant on day one, competing directly with Liquid AI's LFM series and Google's Gemma for the same tool-calling, no-cloud niche.

A RISC-V AI Pocket Computer That Won't Run Current Ubuntu

LilyGo's new K230 Kit, a RISC-V-based AI pocket computer built around Canaan's Kendryte K230 edge-inference chip, is being marketed for on-device AI inference, Meshtastic-compatible mesh radio, and IoT sensor work, according to Tech Times, reported on August 24, 2026.

The catch is right in the headline: the board won't boot Ubuntu 25.10 or later. It ships running CanMV or RT-Smart, and getting an older mainline Linux image on it means going through Canaan's own build system rather than a standard distro installer.

This is a familiar tax on cheap RISC-V AI silicon: the NPU and the marketing move faster than the software stack that's supposed to make it usable outside the vendor's own SDK. For hobbyists chasing on-device inference on non-mainstream chips, that gap between announced capability and installable software is usually where the real project timeline lives.

Seven ESP32s, Wired Together, Chase a Bigger Model

A hobbyist posting as Major-Nebula1743 on the ESP32 subreddit described stitching seven ESP32 boards together over ESP-NOW to run a language model in the neighborhood of 400 million parameters, according to a writeup by XDA Developers. The project builds on an earlier single-board effort that got a 56M-parameter model running over the same ESP-NOW wireless protocol.

This is a community build, not a peer-reviewed benchmark — there's no independent tokens-per-second figure to cite, and the specs come from the builder's own description. It's worth reading as a proof of concept rather than a working product.

What's interesting is the strategy shift: instead of squeezing an ever-larger model into one chip's flash and PSRAM — the approach behind this summer's single-board ESP32 language-model projects — this splits the work across a cluster of cheap, individually weak boards. It's a different answer to the same question: how much model can a few dollars of silicon carry, and does it have to be one chip doing all the carrying?

Three different scales of the same question today — an open-model lab sizing a variant for the edge, a RISC-V board maker learning that shipping silicon is easier than shipping a distro, and a hobbyist deciding one microcontroller isn't enough and reaching for seven.